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ARM AHB5 and APB4

AMBA AHB5 and APB4

Course Family:
AMBA Specifications
SKU/Ref:
ARM_AHB

Course Objectives

This course aims to enable participants to design, verify or debug AHB-based IPs or interconnects. Participants get a detailed understanding of the AHB-5 and APB-4 protocols. In order to explain the purpose of particular AHB signals, an introduction to TrustZone, exclusive resource management and MPU/MMU page attributes is provided. The attendees will learn about AHB ordering rules, that are required to understand the operation of an interconnect.

General Information

Prerequisites

  • Familiarity with Cortex ARM CPUs
  • Knowledge of MMU and caches operation is recommended

Duration & Attendance

  • 2 days
  • Min/max number of participants: 3-15

Location

On site/intra

Target Audience

Engineers and technicians who develop SoCs or IPs based on ARM AMBA AHB5 and APB4 buses.

Program Overview

Day 1 Day 2
INTRODUCTION TO AMBA SPECIFICATIONS (1 hour) AHB5 PROTOCOL (6 hours)
TRUSTZONE ARCHITECTURE (2 hours) APB4 PROTOCOL (1 hour)
EXCLUSIVE RESOURCE MANAGEMENT, SOFTWARE ASPECTS (2 hours)  
MPU / MMU PAGE TYPES (2 hours)  

 

The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.

Additional Information

Teaching Methods & Tools
Lectures with supporting slides, use of projector
Evaluation & Certification
Trainees are quizzed orally at the end of each chapter
Each trainee will fill out and return a training evaluation form upon completion of the training course
All attendees receive a Certificate of Completion upon completion of the training course
Technical Material
Training manuals given to attendees during training in pdf format
Attendees should bring their laptops for local access to course material (presentation, datasheets, …)
Notepad and pen are provided