This course aims to explain the architecture of the ARM Cortex-M3 to enable participants to efficiently design a SoC based on this CPU and develop low level software. Attendees will get a detailed understanding of the internal architecture, especially the implementation of the V7-M specification. They will study the mechanisms specific to ARM V7-M processors, particularly exceptions and MPU. A complete CPU Software Package is used as the basis of all labs. It is provided to attendees so that they can replay the labs after the course by using either a board or an instruction set simulator.
Duration & Attendance
- 4 days
- Min/max number of participants: 3-15
Engineers and technicians who develop SoCs and systems based on the ARM Cortex-M3 architecture.
|Day 1||Day 2||Day 3||Day 4|
|CORTEX-M3 OVERVIEW (1 hour)||CMSIS (1 hour)||LOW POWER MODES (2 hours)||EMBEDDED SOFTWARE DESIGN (2 hours)|
|CORTEX-M3 ARCHITECTURE (3 hours)||MEMORY PROTECTION UNIT (1 hour)||EXCLUSIVE RESOURCE MANAGEMENT (1 hour)||EFFICIENT CODING GUIDELINES (2 hours)|
|ARM V7-M PROGRAMMING (3 hours)||EXCEPTION MECHANISM AND LOW POWER MODES (5 hours)||INVASIVE DEBUG (2 hours)||AHB-LITE, ADVANCED HIGH PERFORMANCE BUS (2 hours)|
|NON INVASIVE DEBUG (2 hours)||APB3.0 - ADVANCED PERIPHERAL BUS (1 hour)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.