This course aims to describe all debug features offered by ARM CPUs in order to enable to take advantage of these features to accelerate the debug time. Participants in charge of SoC architecture will also get informations required to choose the appropriate debug resources. The operation of complex CoreSight units, such as Embedded Trace Macrocell and Cross-Triggering Interface will be clarified through labs based on Lauterbach Trace32 tools.
Duration & Attendance
- 3 days
- Min/max number of participants: 3-15
Engineers and technicians who develop or debug ARM CPU-based SoCs.
|Day 1||Day 2||Day 3|
|INTRODUCTION TO CORESIGHT (2 hours)||SELF-HOSTED DEBUG (2 hours)||ETMv4 (2 hours)|
|TOPOLOGY DETECTION (1 hour)||TRACE (5 hours)||SYSTEM TRACE MACROCELL (2 hours)|
|AUTHENTICATION INTERFACE (1 hour)||EMBEDDED LOGIC ANALYZER (1 hour)|
|IMPLEMENTATION (1 hour)||ARM V7-AR AND V8-A DEBUG (2 hours)|
|EXTERNAL DEBUG (2 hours)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.