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SATA 3.2

SATA 3.2

Course Family:
Serial ATA (SATA)
SKU/Ref:
CVT_SATA

Course Objectives

This course aims to enable participants to design, verify or debug SATA 3.2 IPs and links. Participants get a detailed understanding of the SATA protocol. The attendees will learn the SATA command set and the enumeration specification. The implementation of the new SATA Express feature is also studied.

General Information

Prerequisites

Experience of a digital bus is mandatory

Duration & Attendance

  • 3 days
  • Min/max number of participants: 3-15

Location

On site/intra

Target Audience

Engineers and technicians who develop systems based on Serial ATA 3.2.

Program Overview

Day 1 Day 2 Day 3
ORIGINS OF THE SATA INTERFACE (1 hour) PHY INTERFACE FOR SATA 3 - PIPE (2 hours) TRANSPORT LAYER (2 hours)
SATA ARCHITECTURE (1 hour) LINK LAYER (4 hours) COMMANDS (2 hours)
PHYSICAL LAYER (3 hours) ATA REGISTERS (1 hour) ADVANCED HOST CONTROLLER INTERFACE - AHCI (2 hours)
OUT-OF BAND AND PHY POWER STATES (2 hours)   PORT MULTIPLIER (1 hour)

 

The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.

Additional Information

Teaching Methods & Tools
Lectures with supporting slides, use of projector
Trace captured with Teledyne-Lecroy protocol analyser will help to understand the protocol
Evaluation & Certification
Trainees are quizzed orally at the end of each chapter
Each trainee will fill out and return a training evaluation form upon completion of the training course
All attendees receive a Certificate of Completion upon completion of the training course
Technical Material
Training manuals given to attendees during training in pdf format
Attendees should bring their laptops for local access to course material (presentation, datasheets, …)
Notepad and pen are provided