This course aims to enable participants to design, verify or debug SRIO IPs and links. Participants get a detailed understanding of the Serial RapidIO protocol. The attendees will learn about SRIO hardware and software implementation. Latest specifications, such as data streaming and virtual output queuing extensions will be studied.
Duration & Attendance
- 4 days
- Min/max number of participants: 3-15
Engineers and technicians who develop systems based on Serial RapidIO (SRIO).
|Day 1||Day 2||Day 3||Day 4|
|INTRODUCTION TO RAPIDIO (1 hour)||THE PHYSICAL LAYER – ANALOG SUB-BLOCK (3 hours)||MESSAGE PASSING- LOGICAL LAYER (2 hours)||END-TO-END FLOW CONTROL (1 hour)|
|OVERVIEW OF THE PHYSICAL LAYER (1 hour)||COMMON TRANSPORT LAYER (2 hours)||GLOBAL SHARED MEMORY- LOGICAL LAYER (1 hour)||DATA STREAMING (2 hours)|
|THE PHYSICAL LAYER – 8b10b- LOGICAL SUB-BLOCK (3 hourS)||INPUT / OUTPUT- LOGICAL LAYER (2 hours)||PACKET PRIORITY AND FLOW CONTROL (1 hour)||VIRTUAL OUTPUT QUEUING EXTENSIONS (2 hours)|
|THE PHYSICAL LAYER – 64b67b- NEW FEATURES LOGICAL SUB-BLOCK (2 hours)||ERROR MANAGEMENT (1 hour)||SESSION MANAGEMENT PROTOCOL (2 hours)|
|SYSTEM BRINGUP (2 hours)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.