This course aims to enable participants to implement PONCAT3 / ALLEYCAT3 1G switches / Routers. Participants get a detailed understanding of the switch feature. Attendees will learn how to design a board based on this switch and connect 1G/10G PHYs. All stages between ingress port and egress port will be studied, particularly the utilization of TCAMs.
- Knowledge of Ethernet (802.3) and Bridging (802.1) is recommended
- Courses on ARM CPU also available, including ARMv7-A, which is useful if low level programming is planned
Duration & Attendance
- 5 days
- Min/max number of participants: 3-15
Engineers and technicians who develop systems based on Marvell PONCAT3 / ALLEYCAT3 1G/10G switches.
|Day 1||Day 2||Day 3||Day 4||Day 5|
|10 Gbps ETHERNET BASICS (1 hour)||CPU SUBSYSTEM OVERVIEW (2 hours)||POLICY ENGINE (2 hours)||PORT TRUNKING (1 hour)||QOS SUMMARY (1 hour)|
|802.1Q BASICS (1 hour)||INTRODUCTION TO ALLEYCAT3 AND PONCAT3 SWITCHES (1 hour)||BRIDGE ENGINE (3 hours)||METERING, POLICING AND REMARKING ENGINE (1 hour)||VLAN MANAGEMENT SUMMARY (1 hour)|
|MULTI-PROTOCOL LABEL SWITCHING (MPLS) BASICS (1 hour)||DISTRIBUTED SWITCH ARCHITECTURE (1 hour)||IPv4/IPv6 ROUTER ENGINE (2 hours)||LOGICAL TARGET MAPPING (1/2 hour)||SECURE CONTROL TECHNOLOGY AND NETWORK SHIELD TECHNOLOGY (1 hour)|
|HARDWARE IMPLEMENTATION (4 hours)||SWITCHING CORE ADAPTER (1 hour)||TUNNEL START / ARP TABLE (1/2 hour)||DETAILING SPECIFIC MODES OF OPERATION (2 hour)|
|NETWORK INTERFACES AND MACS (1 hour)||BUFFER AND CONGESTION MANAGEMENT (1 hour)||TRAFFIC MONITORING (1 hour)|
|TUNNEL TERMINATION AND INTERFACE (TTI) (1 hour)||TRANSMIT QUEUES (1 hour)||BRIDGE PORT EXTENDER (1 hour)|
|CENTRALIZED COUNTERS (1/2 hour)|
|LED INTERFACE (1/2 hour)|
|SYNCHRONOUS ETHERNET (1 hour)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.