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NXP Multicore SoC Virtualization

NXP SoC Virtualization

Course Family:
NXP Multicore Processor Technology
SKU/Ref:
NXP_VT

Course Objectives

This course aims to enable participants to understand the hardware mechanisms implemented in recent PowerPC and ARM CPUs to facilitate the execution of multiple virtual machines.

General Information

Prerequisites

  • Experience with a 32-bit processor or DSP is mandatory
  • See the courses on PowerPC QorIQ & Qorivva and ARM i.MX & LayerScape SoCs

Duration & Attendance

  • 2 days, 7 hours a day
  • Min/max number of participants: 3-15

Location

  • On-site/intra (private session)
  • Contact us for public sessions.

Target Audience

Engineers and technicians who implement virtualization technology on NXP SoCs

Program Overview

Day 1 Day 2
OVERVIEW (1–hour) INTERRUPT MANAGEMENT (2–hour)
VIRTUALIZATION ARCHITECTURE (2–hour) IO MEMORY MANAGEMENT UNIT (2–hour)
ADDRESS TRANSLATION (2–hour) SUPPORTING VIRTUALIZATION IN IO PERIPHERALS (2-hour)
TRAPPING TO HYPERVISOR (2–hour) FEATURES OF SOME HYPERVISORS (1-hour)

 

The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.

Additional Information

Teaching Methods & Tools
Lectures with supporting slides, use of projector
Evaluation & Certification
Trainees are quizzed orally at the end of each chapter
Each trainee will fill out and return a training evaluation form upon completion of the training course
All attendees receive a Certificate of Completion upon completion of the training course
Technical Material
Training manuals given to attendees during training in pdf format
Attendees should bring their laptops for local access to course material (presentation, datasheets, …)
Notepad and pen are provided