This course aims to explain the architecture of the ARM Cortex-M33 to enable participants to efficiently design a SoC based on this CPU and develop low level software. Attendees will get a detailed understanding of the internal architecture, especially the implementation of the V8-M specification. They will study the mechanisms specific to ARM V8-M processors, particularly the trustzone implementation. A complete CPU Software Package is used as the basis of all labs. It is provided to attendees so that they can replay the labs after the course by using either a board or an instruction set simulator.
Duration & Attendance
- 5 days
- Min/max number of participants: 3-15
Engineers and technicians who develop SoCs and systems based on the ARM Cortex-M33 architecture.
|Day 1||Day 2||Day 3||Day 4||Day 5|
|CORTEX-M33 OVERVIEW (1 hour)||MEMORY MODEL (2 hours)||EXCEPTION MECHANISM (3 hours)||DEBUG (4 hours)||EFFICIENT CODING GUIDELINES (2 hours)|
|CORTEX-M33 ARCHITECTURE (3 hours)||SECURITY ATTRIBUTION UNIT (SAU) AND IMPLEMENTATION DEFINED ATTRIBUTION UNIT (IDAU) (2 hours)||LOW POWER MODES (2 hours)||EMBEDDED SOFTWARE DESIGN (3 hours)||SIMD INSTRUCTIONS (2 hours)|
|INTRODUCTION TO V8-M ARCHITECTURE (1 hour)||MEMORY PROTECTION UNITS (2 hours)||ARM V8-M MAINLINE PROGRAMMING (2 hours)||FLOATING-POINT UNIT FPv5 (3 hours)|
|SECURITY FRAMEWORK (2 hours)||CMSIS (1 hour)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.