This course aims to enable participants to design, verify or debug SATA 3.2 IPs and links. Participants get a detailed understanding of the SATA protocol. The attendees will learn the SATA command set and the enumeration specification. The implementation of the new SATA Express feature is also studied.
Duration & Attendance
- 3 days
- Min/max number of participants: 3-15
Engineers and technicians who develop systems based on Serial ATA 3.2.
|Day 1||Day 2||Day 3|
|ORIGINS OF THE SATA INTERFACE (1 hour)||PHY INTERFACE FOR SATA 3 - PIPE (2 hours)||TRANSPORT LAYER (2 hours)|
|SATA ARCHITECTURE (1 hour)||LINK LAYER (4 hours)||COMMANDS (2 hours)|
|PHYSICAL LAYER (3 hours)||ATA REGISTERS (1 hour)||ADVANCED HOST CONTROLLER INTERFACE - AHCI (2 hours)|
|OUT-OF BAND AND PHY POWER STATES (2 hours)||PORT MULTIPLIER (1 hour)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.