This course aims to enable participants to understand the hardware mechanisms implemented in recent PowerPC and ARM CPUs to facilitate the execution of multiple virtual machines.
- Experience with a 32-bit processor or DSP is mandatory
- See the courses on PowerPC QorIQ & Qorivva and ARM i.MX & LayerScape SoCs
Duration & Attendance
- 2 days, 7 hours a day
- Min/max number of participants: 3-15
- On-site/intra (private session)
- Contact us for public sessions.
Engineers and technicians who implement virtualization technology on NXP SoCs
|Day 1||Day 2|
|OVERVIEW (1–hour)||INTERRUPT MANAGEMENT (2–hour)|
|VIRTUALIZATION ARCHITECTURE (2–hour)||IO MEMORY MANAGEMENT UNIT (2–hour)|
|ADDRESS TRANSLATION (2–hour)||SUPPORTING VIRTUALIZATION IN IO PERIPHERALS (2-hour)|
|TRAPPING TO HYPERVISOR (2–hour)||FEATURES OF SOME HYPERVISORS (1-hour)|
The detailed course program is available upon request. For on-site training, we can provide a customized program specifically tailored for your audience, needs, and schedule. Contact us to discuss this option.